Lab Almost runs correctly =/

[hiroshi hayashi]

I have my lab running, but the outputs are almost correct compared to
the lab output example in the packet.

The program stopped the User Input after the line M [-1], so I know the
Input section of my lab is correct.

Out of the 24 opertaion cycles, I have the first 20 output correctly.
However, instead of ending after the 24th loop cycle, mine goes up until
31.
Also, my MEM bytes are all correct except for the 2nd the last on the
1st line and the once right below C0.
In my REG output, my G3 line has just the last bit wrong.

Can anyone take a guess as to where my lab might be incorrect? I have
absolutely no idea where to start debugging this code.

Thanks for any suggestions.

[Brandon]

Seems like it's most likely a problem in your pBRL section that would cause
the program to loop more than it should. Make sure you are using a bl for
your branch command, and that you are comparing the proper register to 0.
Also, be sure you don't have any places in your program where there should
be a nop and there isn't. Those would be my suggestions as to where to
start.

[Wayne D. Heym]

It looks like the fault is your execution of the BRL instruction. It
appears that you are allowing it to change the PC even when the ACC is
zero; however, the PC should get altered by the execution of BRL only
when the ACC is negative, not when it is either zero or positive.