hw3

[Elizabeth Neiderman]

I couldn't find anywhere in our notes, our book, or anywhere else how to
deal with dividing when comparing memory references and writing code.
I'm assuming the call would be:

DIV numerator address, denominator address, destination address

Is this correct? Also, does this like the other operations take 4
references; I would think since division is tricky for machines that it
might take more.

Thanks,

Liz

[B A Bair]

There isn't anything special about how division instructions are written
(compared to multiplication, addition or subtraction anyway). The order of
the operands would be Rs1, Rs2, Rd for the SPARC, or Rd, Rs1, Rs2 for the
MIPS (in the book).

Yes, three address instruction architectures do require four memory
references per instruction cycle.

If a machine required additional memory references for some instructions
(but not all), it would probably be a CISC machine.

More during class!

:-)